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450 mhz to 6000 mhz trupwr d etector adl5504 rev. a information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of t hird parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062 - 9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ? 2009- 2011 analog devices, inc. all rights r eserved. features true rms response detector excellent temperature stability 0.25 db rms detection accuracy vs. temperature over 35 db input power dynamic range, inclusive of crest factor rf bandwidths from 450 mhz to 600 0 m hz 500 ? input impedance single - supply operation: 2.5 v to 3.3 v low power: 1.8 ma at 3 .0 v supply rohs compliant part applications power measurement of w- cdma, cdma2000, qpsk -/ qam - based ofdm (lte and wim ax ) , and other complex modulation waveforms rf transmitter or receiver power measurement functional block dia gram rfin vpos vrms comm adl5504 internal fi l tering fltr enbl rms core buffer 100 1k 08437-001 figure 1 . 10 0.01 ?25 ?20 ?15 ?10 ?5 0 5 10 15 output (v) input (dbm) 0.1 1 08437-002 figure 2 . output vs. input level, 3 v supply , frequency 1 9 00 m hz general description the adl5504 is a tr upwr? mean - responding (true rms) power det ector for use in high frequency receiver and transmitter sig nal chains from 450 mhz to 6 000 mhz . requiring only a single supply between 2.5 v and 3.3 v, the detector draws less than 1.8 ma . the input is internall y ac - coupled and has a nominal input impedance of 500 ?. the rms output is a linear - responding dc voltage with a conversion gain of 1.8 7 v/v rms at 900 mhz. the adl5504 is a highly accurate, easy to use means of determining the rms of complex waveforms . i t can be used for power measurements of both simple and complex waveforms but is particularly useful for measuring high crest factor (high peak - to - rms ratio) signals, such as w - cdma, cdma2000, wim ax , wlan, and lte waveforms . the on - chip modulation filter provides adequate averaging for most waveforms. for more complex waveforms, an external capacitor at the fltr pin can be used for supplementary signal de modulation. an on - chip, 100 ? series resistance at the out put, combined with an external shunt capacitor, creates a low - pass filter response that reduces the residual ripple in the dc output voltage. the adl5504 offers excellent temperature stability acro ss a 30 db range and near 0 db measurement error across temperature over the top portion of the dynamic range. in addition to its temperature stability, the adl5504 offers low process variations that further reduce calibration complexity. the power detect or operates from ?40c to +85c and is available in a 6- ball , 0.8 mm 1. 2 mm , wafer level chip scale package. it is fabricated on a high f t silicon bicmos process.
adl5504 rev. a | page 2 of 24 table of contents features .............................................................................................. 1 applications ....................................................................................... 1 functional block diagram .............................................................. 1 general description ......................................................................... 1 revision history ............................................................................... 2 specifications ..................................................................................... 3 absolute maximum ratings ............................................................ 6 esd caution .................................................................................. 6 pin configuration and function descriptions ............................. 7 typical performance characteristics ............................................. 8 circuit description ......................................................................... 13 rms circuit description and filtering ................................... 13 filtering ........................................................................................ 13 output buffer .............................................................................. 13 applications information .............................................................. 14 basic connections ...................................................................... 14 rf input interfacing ................................................................... 14 linearity ....................................................................................... 15 output drive capability and buffering ................................... 16 selecting the square - domain filter and output low - pass filter ............................................................................................. 16 pow er consumption, enable, and power - on/power -off response time ............................................................................ 17 device calibration and error calculation .............................. 17 calibration for impr oved accuracy ......................................... 18 drift over a reduced temperature range .............................. 19 device handling ......................................................................... 19 evaluation board ........................................................................ 20 outline dimensions ....................................................................... 22 ordering guide .......................................................................... 22 revision history 1/11 rev . 0 to rev. a chan ge to filtering section ........................................................... 13 change to land pattern and soldering information section ... 20 10/0 9 revision 0: initial version
adl5504 rev. a | page 3 of 24 specifications t a = 25c, v s = 3.0 v, c flt r = 10 nf , c out = open, light condition 600 lux , 75 ? input termin ation resistor, unless otherwise noted. table 1. parameter test condition s min typ max unit frequency range input rfin 450 6000 mhz rf input (f = 450 mhz) input rfin to output vrms input impedance no termination 520||1.00 ?||pf rms conversion dynamic range 1 continuous wave (cw) input, ?40c < t a < +85c 0.25 db error 2 delta from 25c 25 db 0.25 db error 3 16 db 1 db error 3 35 db 2 db error 3 39 db maximum input level 0.25 db error 3 15 dbm minimum input level 1 db error 3 ?21 dbm conversion gain vrms = (gain v in ) + intercept 1.90 v/v rms output intercept 4 0.003 v output voltage, high input power p in = 5 dbm, 400 mv rms 0.760 output voltage, low input power p in = ?15 dbm, 40 mv rms 0.077 temperature sensitivity p in = 0 dbm 25c < t a < 85c 0.0027 db/c ?40c < t a < +25c 0.0024 db/c rf input (f = 900 mhz) input rfin to output vrms input impedance no termination 370||0.80 ?||pf rms conversion dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 2 delta fro m 25c 27 db 0.25 db error 3 17 db 1 db error 3 35 db 2 db error 3 39 db maximum input level 0.25 db error 3 15 dbm m inimum input level 1 db error 3 ?22 dbm conversion gain vrms = (gain v in ) + intercept 1.6 1.87 2.2 v/v rms output intercept 4 ?0.1 +0.004 +0.1 v output voltage, high input power p in = 5 dbm, 400 mv rms 0.746 v output voltage, low input power p in = ?15 dbm, 40 mv rms 0.077 v temperature sensitivity p in = 0 dbm 25c < t a < 85c 0.0024 db/c ?40c < t a < +25c 0.0018 db/c
adl5504 rev. a | page 4 of 2 4 parameter test condition s min typ max unit rf input (f = 1900 mhz) input rfin to output vrms input impedance no termination 260||0.68 ?||pf rms conv ersion dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 2 delta from 25c 20 db 0.25 db error 3 15 db 1 db error 3 35 db 2 db error 3 40 db maximum input level 0.25 db error 3 15 dbm minimum input level 1 db error 3 ?22 dbm conversion gain vrms = (gain v in ) + intercept 1.82 v/v rms output intercept 4 0.001 v output voltage, high input power p in = 5 dbm, 400 mv rms 0.719 v output voltage, low input power p in = ?15 dbm, 40 mv rms 0.072 v temperature sensitivit y p in = 0 dbm 25c < t a < 85c 0.0016 db/c ?40c < t a < +25c 0.0070 db/c rf input (f = 2600 mhz) input rfin to output vrms input impedance no termination 240||0.61 ?||pf rms conversion dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 2 delta from 25c 13 db 0.25 db error 3 10 db 1 db error 3 35 db 2 db error 3 40 db maximum input level 0.25 db error 3 15 dbm minimum input level 1 db error 3 ?22 dbm conversion gain vrms = (gain v in ) + intercept 1.79 v/v rms output intercept 4 ?0.003 v output voltage, high input power p in = 5 dbm, 400 mv rms 0.702 v output voltage, low input power p in = ?15 dbm, 40 mv rms 0.069 v temperature sensitivity p in = 0 dbm 25c < t a < 85c 0.0031 db/c ?40 c < t a < +25c 0.0046 db/c rf input (f = 3500 mhz) input rfin to output vrms input impedance no termination 200||0.50 ?||pf rms conversion dynamic range 1 cw input, ?40c < t a < +85c 0.25 db error 2 delta from 25c 6 db 0.25 db error 3 5 db 1 db error 3 34 db 2 db error 3 40 db maximum input level 0.25 db error 3 13 dbm minimum input level 1 db error 3 ?21 dbm conversion gain vrms = (gain v in ) + intercept 1.65 v/v rms output intercept 4 ?0.006 v output voltage, high input power p in = 5 dbm, 400 mv rms 0.639 v output voltage, low input power p in = ?15 dbm, 40 mv rms 0.060 v temperature sensitivity p in = 0 dbm 25c < t a < 85c 0.0037 db/c ?40c < t a < +25c 0.0074 db/c
adl5504 rev. a | page 5 of 24 parameter test condition s min typ max unit rf input (f = 6000 mhz) input rfin to output vrms input impedance no termination 90||0.31 ?||pf rms conversion dy namic range 1 cw input, ?40c < t a < +85c 1 db error 3 25 db 2 db error 3 34 db maximum input level 0.25 db error 3 12 dbm minimum input level 1 db error 3 ?16 dbm conversion gain vrms = (gain v in ) + intercept 0.82 v/v rms output intercept 4 -0.005 v output voltage, high input power p in = 5 dbm, 400 mv rms 0.314 v output voltage, low input power p in = ?15 dbm, 40 mv rms 0.027 v temperature sensitivity p in = 0 dbm 25c < t a < 85c 0.0108 db/c ?40c < t a < +25c 0.0120 db/c vrms output pin vrms output offset no signal at rfi n 10 100 mv maximum output voltage v s = 3.0 v, r load 10 k ? 2.5 v available output current 3 ma pulse response time 10 db step, 10% to 90% of settling level, no filter capacitor 3 s enable interface pin enbl logic level to enable power, high condition 2.5 v v s 3.3 v, ?40c < t a < +85c 1.8 v pos v input current when high 2.5 v at enbl, C 40c < t a < +85c 0.05 0.1 a logic level to disable power, low condition 2.5 v v s 3.3 v, ?40c < t a < +85c ?0.5 +0.5 v power - up resp onse time 5 c fltr = open, 0 dbm at rfin 1 s c fltr = 10 nf, 0 dbm at rfin 8 s power supplies operating range ?40c < t a < +85c 2.5 3.3 v quiescent current 6 no signal at rfin, enbl high input condition 1.8 ma disable current 7 enbl input low condition 0.1 1 a 1 the available output swing and, therefor e, the dynamic range are altered by the supply voltage; see figure 8 . 2 error referred to delta from 25c response; see figure 13 to figure 15 and figure 19 to figure 21 . 3 error referred to best - fit line at 25c; see figure 10 to figure 12 and figure 16 to figure 18 . 4 calculated using linear regres sion. 5 the response time is measured from 10% to 90% of settling level; see figure 31 to figure 33 . 6 supply current is input level - dependent; see figure 27 . 7 guaranteed but not tested; limits are specified at six sigma levels.
adl5504 rev. a | page 6 of 24 absolute maximum rat ings table 2. parameter rating supply voltage, v s 3.5 v vrms, enbl 0 v to v s rfin 1.25 v rms equivalent power, referred to 50 ? 15 dbm internal power dissipation 150 mw ja (wlcs p) 260c/w maximum junction temperature 125c operating temperature range ?40c to +85c storage temperature range ?65c to +150c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress ra ting only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reli ability. esd caution
adl5504 rev. a | page 7 of 24 pin configuration and function descripti ons adl5504 top view (ball side down) not to scale 1 6 3 4 2 fltr rfin vpos enbl comm vrms 5 08437-003 figure 3 . pin configuration table 3 . pin function descriptions pin o. neonic description 1 fltr modulation filter . connect a n external capacitor to this pin to lower the corner frequency of the modulation filter . 2 vpos supply voltage. the o perational range is 2.5 v to 3. 3 v. 3 rfin signal input. this pin is internally ac - coupled after internal termination resistance. the n ominal input impedance is 500 ?. 4 comm device ground. 5 vrms rms output. this pin is a rail -to - rail voltage output with limited current drive capability. the output has an internal 100 ? series resistance. high resistive loads and low capacitance loads are recommended to preserve output swing and allow fast response. 6 enbl enable. connect this pin to v s for normal operation. connect this pin to ground for disable mode.
adl5504 rev. a | page 8 of 24 typical performance characteristics t a = 25c , v s = 3.0 v , c flt r = 10 nf , c out = open , light conditio n 600 lux , 75 ? input termination resistor ; colors: black = +25c, blue = ? 40c, red = +85c ; unless otherwise noted. 10 0.01 ?25 ?20 ?15 ?10 ?5 0 5 10 15 output (v) input (dbm) 0.1 1 450 900 1900 2600 3500 5000 6000 08437-004 figure 4 . output vs. input level, 450 mhz, 900 mhz, 1900 mhz, 2600 mhz, 3500 mhz, 5000 mhz, 6000 mhz frequen cies , 3.0 v supply 0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0 inp ut (v rms) output (v) 450 900 1900 2600 3500 5000 6000 08437-005 figure 5 . output vs. input level (linear scale), 450 mhz, 900 mhz, 1900 mhz, 2600 mhz, 3500 mhz, 5000 mhz, 6000 mhz frequencies , 3.0 v supply 0 2.5 0 6k frequency (mhz) conversion gain (v/v rms) intercept (mv) 2.0 1.5 1.0 0.5 0 100 80 60 40 20 1k 2k 3k 4k 5k 08437-006 figure 6 . conversion gain and intercept vs. frequency, 3.0 v supply at ?40c, +25c, and +85c ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 450 900 1900 2600 3500 5000 6000 08437-007 figure 7 . linearity error vs. input level, 450 mhz, 900 mhz, 1900 mhz, 2600 mhz, 3500 mhz, 5000 mhz, 6000 mhz frequencies , 3.0 v supply 10 0.01 ?25 ?20 ?15 ?10 ?5 0 5 10 15 output (v) input (dbm) 0.1 1 2.5v 2.7v 3.0v 3.3v 08437-008 figure 8 . output vs. input level, 9 00 mhz frequency, 2.5 v, 2.7 v, 3.0 v, and 3.3 v supplies 0 700 shunt capacitace (pf) frequency (ghz) shunt resistance ( ?) 1.0 2.0 3.0 0.5 1.5 2.5 600 500 400 300 200 100 0 1.4 1.2 1.0 0. 8 0. 6 0.4 0.2 shunt resistance shunt capacitance 08437-009 figure 9 . input impedance vs. frequency, 3.0 v supply, at ?40c, +25c, and +85c
adl5504 rev. a | page 9 of 24 ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-010 figure 10 . output temperature drift from +25c linear re ference for 50 devices at ?40c, +25c, and +85c, 450 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-011 figure 11 . output temperature drift from +25c linear reference for 50 devices at ?40c, +25c, and +85c, 900 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-012 figure 12 . output temperature drift from +25c linear reference for 50 devices at ?40c, +25c, and +85c, 1900 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-013 figure 13 . output delta from +25c output voltage for 50 devices at ?40c and +85c, 450 mhz frequ ency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-014 figure 14 . output delta from +25c output voltage for 50 devices at ?40c and +85c, 900 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-015 figure 15 . output delta from +25c output voltage for 50 devices at ?40c and +85c, 190 0 mhz frequency
adl5504 rev. a | page 10 of 24 ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-016 figure 16 . output temperature drift from +25c linear reference for 50 devices at ?40c, +25c, and +85c, 2600 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-017 figure 17 . output temperature drift from +25c linear reference for 50 devices at ?40c, +25c, and +85c, 3500 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-018 figure 18 . output temperature drift from +25c linear reference for 50 devices at ?40c, +25c, and +85c, 6000 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-019 figure 19 . output delta from +25c output voltage for 50 devices at ?40c and +85c, 2600 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-020 figure 20 . output delta from +25c output voltage for 50 devices at ?40c and +85c, 3500 mhz frequency ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-021 figure 21 . output delta from +25c output voltage for 50 devices at ?40c and +85c, 6000 mhz frequency
adl5504 rev. a | page 11 of 24 ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 cw 12.2kbps, dpcch (C5.46db, 15ksps) + dpdch (0db, 60ksps), 3.4db cf 144kbps, dpcch (C11.48db, 15ksps) + dpdch (0db, 480ksps), 3.3db cf 768kbps, dpcch (C11.48db, 15ksps) + dpdch1 + 2 (0db, 960ksps), 5.8db cf dpcch (?6.02db, 15ksps) + dpdch (?4.08db, 60ksps) + hs-dpcch (0db, 15ksps), 4.91db cfdpcch (?6.02db, 15ksps) + dpdch (?11.48db, 60ksps) + hs-dpcch (0db, 15ksps) , 5.34db cf dpcch (?6.02db, 15ksps) + hs-dpcch (0db, 15ksps), 5.44db cf 08437-022 figure 22 . error from cw linear reference vs. input with various w- cdma reverse link waveforms at 900 mhz , c fltr = 10 nf, c out = open cw test model 1 with 16 dpch, 1 carrier test model 1 with 32 dpch, 1 carrier test model 1 with 64 dpch, 1 carrier test model 1 with 64 dpch, 2 carriers test model 1 with 64 dpch, 3 carriers test model 1 with 64 dpch, 4 carriers ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-023 figure 23 . error from cw linear reference vs. input with various w- cdma forward link waveforms at 2200 mhz, c fltr = 10 nf, c out = open ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 cw bpsk, 11db cf qpsk, 11db cf 16qam, 12db cf 64qam, 11db cf 08437-024 figure 24 . error from cw linear r eference vs. input with various 802.16 ofdm waveforms at 3500 mhz, 10 mhz signal bw, and 256 subcarriers for all modulated signals , c fltr = 10 nf, c out = open cw pich, 4.7db pich + fch (9.6kbps), 4.8db cf pich + fch (9.6kbps) + dcch, 6.3db cf pich + fch (9.6kbps) + sch (153.6kbps), 6.7db pich + fch (9.6kbps) + dcch +sch (153.6kbps), 7.6db cf ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 08437-025 figure 25 . error from cw linear reference vs. input with various c dma2000 reverse link waveforms at 1900 mhz, c fltr = 1 2 nf, c out = open ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 cw 16qam rb1 16qam rb10 16qam rb100 qpsk rb1 qpsk rb10 qpsk rb100 08437-026 figure 26 . error from cw linear reference vs. input with various lte reverse link waveforms at 2600 mhz, c fltr = 1 2 nf, c out = open 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 0 1.0 inp ut (v rms) supply current (ma) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 2.5v 08437-027 figure 27 . supply current vs. input level, 2.5 v, 3.0 v, and 3.3 v suppli es, 900 mhz frequency, at ?40c, +25c, and +85c
adl5504 rev. a | page 12 of 24 70mv rms 160mv rms 250mv rms 4s/div vrms (150mv/div) pulsed rfin 400mv rms rf input 08437-028 figure 28 . output response to various rf input pulse levels, 3.0 v supply, 900 mhz frequency, c fltr = open, c out = open , r out = open 70mv rms 160mv rms 250mv rms 10s/div vrms (150mv/div) pulsed rfin 400mv rms rf input 08437-029 figure 29 . out put response to various rf input pulse levels, 3.0 v supply, 900 mhz frequency, c fltr = 10 nf, c out = open , r out = open 70mv rms 160mv rms 250mv rms 10s/div vrms (150mv/div) pulsed rfin 400mv rms rf input 08437-030 figure 30 . output response to various rf input pulse levels, 3.0 v supply, 900 mhz frequency, c fltr = open , c out = 10 nf, r out = 1 k ? 70mv rms 160mv rms 250mv rms 2s/div vrms (150mv/div) enbl 400mv rms rf input 08437-031 figure 31 . output response to enable gating at various rf input levels, 3.0 v supply, 900 mhz frequency, c fltr = open, c out = open , r out = open 70mv rms 160mv rms 250mv rms 4s/div vrms (150mv/div) enbl 400mv rms rf input 08437-032 figure 32 . output response to enable gating at va rious rf input levels, 3.0 v supply, 900 mhz frequency, c fltr = 10 nf, c out = open , r out = open 70mv rms 160mv rms 250mv rms 10s/div vrms (150mv/div) enbl 400mv rms rf input 08437-033 figure 33 . output response to enable gating at various rf input levels, 3.0 v supply, 900 mhz frequency, c fltr =open, c out = 10 nf, r out = 1 k ?
adl5504 rev. a | page 13 of 24 circuit description the adl5504 employs two - stage detection. the critical aspect of this technical approach is the concept of first stripping the carrier to reveal the envelope and then performing the required analog computation of rms . rms c ircuit d escription and f iltering the rms processing is executed using a proprietary translinear technique. this method is a mathematically accurate rms computing approach and allows achieving unprecedented rms accuracies for complex modulation signals irrespec tive of the crest factor of the input signal. an integrating filter cap acitor performs the square - domain averaging. the vrms output can be expressed as t1t2 dt v a vrms t2 t1 in ? = 2 note that a is a scaling parameter that is d etermined by the on - chip resistor ra tio , and there are no other scaling parameters involved in this computation, which means that the rms output is inherently free from any sources of error due to temperature, supply , and process variation s. filtering an important aspect of rms - dc conversio n is the need for averaging (the function is root - mean - square). the on - chip averaging in the square domain has a corner frequency of approximately 1 40 khz and is sufficient for common modu lation signals, such as cdma - , cdma2000 - , wcdma -, and qpsk -/ qam - bas ed ofdm (for example, lte, wlan , and wimax). for improved accuracy with more complex rf waveforms (with modulation components extending down into the kilohertz region), more filtering is necessary to supplement the on - chip, low - pass filter. for this rea son, the fltr pin is provided; a capacitor attached between this pin and vpos can extend the averaging time to very low frequencies (see the selecting the square - domain filter and output low - pass filter section ). any external c apacitor acts on a 1 k ? resistor to yield a new corner frequency for the rms filter (see figure 1 ). adequa te filtering ensures the accuracy of the rms measur ement; however, some ripple or ac residual can still be present on the d c output. to reduce this ripple, an external shunt capacitor can be used at the output to form a low - pass filter with the on - chip, 100 resistance (see the selecting the square - domain filter and output low - pass filter section). output buffer a buffer take s the internal rms signal and amplifies it accor - dingly before it is out put on the vrms pin. the output stage of the rms buffer is a common source pmos with a resistive load to provide a rail - to - rail output. t he buffer has a 100 ? on - chip series resistanc e on the o utput , a llow ing for easy low - pass filtering .
adl5504 rev. a | page 14 of 24 applications informa tion basic connections figure 34 shows the basic connections for the adl5504 . the device is powered by a sin gle supply between 2.5 v and 3.3 v, with a quiescent current of 1.8 ma. the vpos pin is decoupled using 100 pf and 0.1 f capacitors. placing a single 75 resistor at the rf input provides a broadband match of 50 ?. more precise resistive or reactive matches can be applied for narrow frequency band use (see the rf input interfacing section ). the rms averaging can be augmented by placing additional capacitance at c flt r . the ac residual can be reduced further by increasing the output capacitance, c out . the combination of the internal 100 ? output resistance and c out produce s a low - pass filter to reduce output ri pple of the vrms output (see the selecting the square - domain filter and output low - pass filter section for more details) . rfin c fltr +v s = 2.5v to 3.3v vrms r out 0.1f 100pf c out fltr vpos rfin enbl vrms comm adl5504 1 2 3 6 5 4 r10 75 ? 08437-034 figure 34 . basic connections for adl5504 rf input interfacing the input impedanc e of the adl5504 decreases with increasing frequency in both its resistive and capacitive components ( see figure 9 ). the resistive component varies from 370 at 900 mhz to about 240 at 2600 mhz . a number of options exist for input matching. for operation at multiple frequencies, a 75 shunt to ground, as shown in figure 35 , provides the best overall match. for use at a single fr equency, a resistive or a reactive match can be used. by plotting the input impedance on a smith c hart, the best value for a resistive match can be calculated. (both input impedance and input capacitance can vary by up to 20% around their nominal values.) where vswr is critical, the match can be improved with a series inductor placed before the shunt component. ad l5504 rfin rf transmission line 50? directional coupler 75? attn 08437-035 figure 35 . input i nterfacing to directional coupler resistive tap rf input figure 36 shows a technique for coupling the input signal into the adl5504 that can be applicable when the input signal is much larger than the input range of the adl5504 . a series resistor combines with the input impedance of the adl5504 to attenuate the input signal. because this series resistor forms a divider with the frequency - dependent input impedance, the apparent gain changes greatly with frequency. however, this method has the advantage of very little power being tapped off in rf power transmission application s. if the resistor is large compared with the impedance of the transmission line , the vswr of the system is relatively unaffected. ad l5504 rfin rf transmission line r series 08437-036 figure 36 . attenuating the input signal the resistive tap or series resistance, r series , can be e xpressed as r series = r in (1 ? 10 attn /20 )/(10 attn /20 ) (1) where: r in is the input resistance of rfin. at tn is the desired attenuation factor in d ecibels . for example, if a power amplifier with a maximum output power of 28 dbm is m atched to the adl5504 input at 5 dbm, then a ?23 d b attenuation factor is required. at 900 mhz, the input resistance, r in , is 370 ?. r series = (3 70 ?)(1 ? 10 ?23/20 )/(10 ?23/20 ) = 4 870 ? (2) thus, for an attenuation of ?23 db, a series resistance of approximately 4.87 k ? is needed.
adl5504 rev. a | page 15 of 24 multiple rf inputs figure 37 shows a technique for combining multiple rf input signals to the adl5504 . some applications can share a single detector for multiple bands. three 16.5 ? resistors in a t network combine the three 50 ? terminations (inclu ding the adl5504 with the shunt 75 ? matching component ). the broadband resistive combiner ensures that each port of the t network sees a 50 ? termination. because there are only 6 db of isolation from one port of the combiner to the other ports, only one band should be active at a time. ad l5504 rfin band 1 50? band 2 directional coupler 16. 5 ? 50? 16. 5 ? 16. 5 ? directional coupler 75? 08437-037 figure 37 . combining multiple rf input signals linearity because the adl5504 is a linear responding device, p lots of output voltage vs. input voltage result in a straight line (see figure 4 and figure 5 ) and the dynamic range in decibels ( db ) is not clearly visible. it is more useful to plot the error on a logarith - mic scale, as shown in figure 7 . the deviation of the plot from the ideal straight line characteristic is caused by input stage clipping at the high end and by signal offsets at the low end. however, offsets at the low end can be either positive or neg - ative; therefore, the linearity error vs. input level pl ot s (see figure 7 ) can also trend upwards at the low end. figure 10 to figure 12 and figure 16 to figure 18 show error di stributions for a large population of devices at specific frequencies over temperature . it is also apparent in figure 7 that the error at the lower portion of the dynamic range tends to shift up as frequency is increased . this is due to the calibration points chosen, ?14 dbm and +8 d bm (see the device calibration and error calculation section ). the absolute value cell has an input impedance that varies with frequency. the result is a decrease in the actual voltage across the squaring cell as the frequency increases, reducing the conversion gain . the dynamic range is near constant over frequency, but with a decrease in conversion gain as frequency is increased. output swing at 900 mhz, the vrms output voltage is nominally 1.87 the input rms v oltage (a conversion gain of 1.8 7 v/v rms) . the output voltage swings from near ground to 2. 5 v on a 3.0 v supply. figure 8 shows the output swings of the adl5504 to a cw input for various supply voltages. only at the lowest sup ply voltage (2.5 v) is there a reduction in the dynamic range as the input headroom decreases. output offset the adl5504 has a 1 db error detection range of about 30 db, as shown in figure 10 to figure 12 and figure 16 to figure 18 . the error is referred to the best - fit line defined in the linear region of the output response (see the device calibration and error calculati on section for more details). below an input power of ? 18 dbm, the response is no longer linear and begins to lose accuracy. in addition, depending on the supply voltage, saturation may limit the detection accuracy above 12 dbm. calibration points should be chosen in the linear region, avoiding the nonlinear ranges at the high and low extremes. figure 38 shows a distribution of the output response vs. the input for multiple devices. the adl5504 loses accuracy at low input po wers as the output response begins to fan out. as the input power is reduced, the spread of the output response increases along with the error. 10 0.0001 ?25 15 input (dbm) output (v) 0.001 0.01 0.1 1 ?20 ?15 ?10 ?5 0 5 10 08437-038 figure 38 . output vs. input level distribution of 50 devices, 900 mhz frequency , 3 . 0 v supply although some devices follow the ideal linear response at very low input powers, not all devices continue the ideal linear regre s- sion to a near 0 v y - intercept. some devices exhibit output responses that rapidly decrease and some flatten out. w ith no rf signal applied, the adl5504 has a typical output offset of 10 mv (with a maximum of 100 mv) on vrms .
adl5504 rev. a | page 16 of 24 output drive capability and buffering the adl5504 is capable of sourcing a vrms output current of approximately 3 ma. the output current is so urced through the on - chip, 100 ? series resistor; therefore, any load resistor forms a voltage divide r with this on - chip resistance. it is recommended that the adl5504 vrms output drive high resist ance loads to preserve output swing. if an application requ ires driving a low resistance load (as well as in cases where increasing the nominal conversion gain is desired), a buffering circuit is necessary. selecting the square - domain filter and output low - pass filter the internal filter capacitor of the adl5504 p rovides averaging in the square domain but leaves some residual ac on the output. signals with high peak - to - average ratios, such as w - cdma or cdma 2000, can produce ac residual levels on the adl5504 vrms dc output. to reduce the effects of these low frequen cy components in the waveforms, some additional filtering is required. the square - domain filter capacitance of the adl5504 can be augmented by connecting a capacitor between pin 1 (fltr) and pin 2 (vpos). in addition, t he vrms output of the adl5504 can be filtered directly by placin g a capacitor between vrms (pin 5) and ground. the combination of the on - chip, 100 ? output series resistance and the external shunt capacitor forms a low - pass filter to reduce the residual ac. figure 39 and figure 40 show the effects on the residual ripple vs . the output and square - domain filter capac itor values at two communication standards with high peak - to - average ratios. note that there is a trade - off between ac residual and response time. l arge filter capacitances increase the turn - on and pulse response times (see figure 28 to figure 33 ). figure 41 shows the effect of the two filtering options, the output filter and the square - domain filter capacitor, on the pulse response time of the adl5504 . for more information on the effects of the filter capacitances on the response, see the power consumption, enable, and power -o n/power - off response time section. 0 100 1 10 100 1000 capacitance (nf) ac residual (mv p-p) 90 80 70 60 50 40 30 20 10 c fltr c out 08437-039 figure 39 . ac residual vs. c flt r and c out , w-cdma reverse link ( 5.8 db cf) waveform 0 50 100 150 200 250 300 350 400 1 10 100 1000 capacitance (nf) ac residual (mv p-p) c fltr c out 08437-040 figure 40 . ac residual vs. c fltr and c out , w-cdma forward link (11.7 db cf) wav eform 0 25 50 75 100 125 150 175 200 225 250 100 200 300 400 500 600 700 800 900 1000 c out response time ( s) 0 1 10 100 1000 capacitance (nf) c fltr response time ( s) c fltr c out 08437-041 figure 41 . c fltr and c out response time vs. capacitance
adl5504 rev. a | page 17 of 24 power consumption, enable, and power - on/power - off response time the quiescent current consumption of the adl5504 varies linearly with the size of the input signal from approximately 1.8 ma for no signal up to 9 ma at an input level of 0.7 v rms ( 10 dbm, re ferred to 50 ?). there is little variation in supply current across power supply voltage or temperature, as shown in figure 27 . the adl5 504 can be disabled either by pulling the enbl (pin 6) to comm (pin 4) or by removing the power supply to the device. disabling the device via the enbl function reduces the leakage current to less than 1 a. when the device is disabled, the output impedanc e increases to approximately 5.5 k ? on vrms . the turn - on time and pulse response is strongly influenced by the size s of the square - domain filter and the output shunt capacitor. figure 42 shows a plot of the output response to an rf pulse on the rfin pin, with a 0.1 f output filter capacitor and a no square - domain filter capacitor. the falling edge is particularly dependent on the output shunt capacitance, as shown in figure 42 . 70mv rms 160mv rms 250mv rms 1ms/div vrms (150mv/div) pulsed rfin 400mv rms rf input 08437-042 figure 42 . output response to various rf input pulse levels, 3 v supply , 900 mhz frequency , square - domain filter open, c out = 0.1 f to improve the falling edge of the enable and pulse responses, a resistor can be placed in parallel with the output shun t capacitor. the added resistance helps to discharge the output filter capacitor. although this method reduces the power - off time, the added load resistor also attenuates the output (see the output drive capability and buffering s ection). 1ms/div vrms (150mv/div) pulsed rfin 70mv rms 400mv rms rf input 250mv rms 160mv rms 08437-043 figure 43 . output response to various rf input pulse levels, 3 v supply , 900 mhz frequency , square - domain filter open, c out = 0.1 f with parallel 1 k ? the square - domain filter improves the rms accuracy for high crest factors (see the selecting the square - domain filter and output low - pass filter section), but it can hinder the response time. for optimum response time and low ac residual, both the square - domain filter and the output filter shou ld be used. the square - domain filter at fltr can be reduced to improve response time, and the remaining ac residual can be decreased by using the output filter, which has a smaller time constant. device calibration a nd error calculation because slope and intercept vary from device to device , board - level calibration must be performed to achieve high accuracy. in general, calibration is performed by applying two input power levels to the adl5504 and measuring the corresponding output voltages. the calibration points are generally chosen to be within the linear operating range of the device. the best - fit line is char acterized by calculating the conversion gain (or slope) and intercept using the following equations: gain = (v v rms2 ? v v rms1 )/( v in2 ? v in1 ) (3) i ntercept = v v rms1 ? ( gain v in1 ) (4) where: v in x is the rms input voltage to rfin. v v rms x is the voltage output at vrms. once gain and intercept are calculated, an equation can be written that allows calculation of an (unknown) input power based on the m easured output voltage. v in = (v vrms ? intercept )/ gain (5) for an ideal (known) input power, the law conformance error of the measured data can be calculated as error (db) = 20 log [( v v rms, measured ? intercept )/ ( gain v in, ideal )] (6)
adl5504 rev. a | page 18 of 24 figure 44 shows a plot of the error at 25c, the temperature at which the adl5504 is calibrated. note that the error is not 0; this is because the adl5504 does not perfectly follow the ideal linear equation, even within its operating regio n. the error at the calibration points is, however, equal to 0 by definition. figure 44 also shows error plots for the output voltage at ? 40c and +85c. these error plots are calculated using the gain and intercept at 25c. t his is consistent with calibration in a mass production environment where calibration at temperature is not practical. +85c ?40c ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 +25c 08437-044 figure 44 . error from linear reference vs. input at ?40c, +25c, and +85c vs. +25c linear reference, 1900 mhz frequency , 3 .0 v supply calibration for impr oved accuracy another way of presenting the error function of the adl5504 is shown in figure 45 . in this case, the decibel ( db ) error at hot and cold temperatures is calculated with respect to the transfer function at ambient temperature . this is a key difference in comparison to figure 44 , in which the error was calculated with respect to the ideal linear transfer function at ambient temperature . when this alternative technique is used, the error at ambient temperature becomes equal to 0 by definition (see figure 45). this plot is a useful tool for estimating temperature drift at a particular power level with respect t o the (nonideal) response at ambient temperature . the linearity and dynamic range tend to be improved artificially with this type of plot because the adl5504 does not perfectly follow the ideal linear equation (especially outside of its linear operating r ange). achieving this level of accuracy in an end application requires calibration at multiple points in the operating range of the device. in some applications, very high accuracy is required at just one power level or over a reduced input range. for exa mple, in a wireless transmitter, the accuracy of the high power amplifier (hpa) is most critical at or close to full power. the adl5504 offers a tight error distribution in the high input power range, as shown in figure 45. t he high accuracy range, beginning around 2 dbm at 1900 mhz , offers 12 db of 0.15 db detection error over temperature . multiple point calibration at ambient temperature in the reduced range offers precise power measurement with near 0 db error from ? 40c to +85c. ?3 ?2 ?1 0 1 2 3 input (dbm) error (db) ?25 ?20 ?15 ?10 ?5 0 5 10 15 +25c ?40c +85c 08437-045 figure 45 . error from +25c output voltage at ?40c, +25c, and +85c after ambient normalization, 1900 mhz frequency , 3 .0 v supply note that the high accuracy range center varies over frequency (see figure 13 to figure 15 and figure 19 to figure 21).
adl5504 rev. a | page 19 of 24 drift over a reduced temperature range figure 46 shows the error over tempera ture for a 1 9 00 m hz input signal. the e rror due to drift over temperature consis - tently remains within 0.2 0 db and only begins to exceed this limit when the ambient temperature rise s above +55 c and drops below ? 30 c. for all frequ encies using a reduced t emper - ature range, higher measurement accuracy is achievable. ?1.00 ?0.75 ?0.50 ?0.25 0 0.25 0.50 0.75 1.00 ?25 ?20 ?15 ?10 ?5 0 5 10 15 input (dbm) error (db) ?40c ?30c ?20c ?10c 0c +5c +15c +25c +35c +45c +55c +65c +75c +85c 08437-046 figure 46 . typical drift at 19 00 m hz for various temperatures device handling the wafer level chip scale package consists of solder bumps connected to the active side of the die. the part is pb- free and rohs compliant with 95.5% tin, 4.0% silver, and 0.5% copper solder bump composition. the wlcsp can be mounted on printed circuit boards using standard surface - mount assembly techniques; however, caution should be taken t o avoid damaging the die. see the an - 617 application note , microcsp wafer level chip scale package , for additional information. wlcsp devices are bumped die; therefore, the exposed die may be sensitive to light, which can influence specified limits. lighti ng in excess of 600 lux can degrade performance.
adl5504 rev. a | page 20 of 24 evaluation board figure 47 shows the schematic of the adl5504 evaluation board. the board is powered by a single supply in the 2.5 v to 3.3 v range. the power supply is decouple d by 100 pf and 0.1 f capacitors. the device must be enabled by switching sw1a to t he position labeled on . the rf input has a broadband match of 50 ? using a single 75 resistor at r 7a . more precise matching at spot frequencies is possible (see the rf input interfacing section). table 4 details the various configuration options of the evaluation board. figure 48 shows the layout of the evaluation board. land pattern and sol dering information pad diameters of 0.2 0 mm are recommended with a solder paste mask opening of 0.3 0 mm. for the rf input trace, a trace width of 0.30 mm is used, which corresponds to a 50 characteristic impedance for the dielectric material being used ( fr4). all traces going to the pads are tapered down to 0.15 mm. for the rfin line, the length of the tapered section is 0.20 mm. adl5504 fltr vpos rfin enbl vrms comm c1a 100pf c6 (open) c5 (open) 1 2 3 6 5 4 ena vposa sw1a vposa (p1 ? a1,b1) (p1 ? b8) vposa rfina r7 a 75? r4 a 0 ? r1 a (open) r3 a 0 ? c4a (open) r2a (open) vrmsa (p1 ? b4) r5a (open) c3 a 10nf c9a (open) c2a 0.1 f (p1 ? b6) r9 a (open) (p1 ? b12) r6a (open) c8 a (open) c7 a (open) vposa r8 a (open) r10a (open) p2 08437-047 figure 47 . evaluation board schematic 08437-048 figure 48 . layout of evaluation board, component side
adl5504 rev. a | page 21 of 24 table 4. evaluation board configuration options component description default condition vposa, gnda ground and supply vector pins. not applicable c1a, c2a, c7a, c8a, c9a, c5, c6 power supply decoupling. nominal supply decoupling of 0.01 f and 100 pf. c1a = 100 pf (size 0402) c2a = 0.1 f (size 0402) c7a = c8a = open (size 0805) c9a = open (size 0402) c5 = c6 = open (size 0402) c3a filter capacitor. the internal rms averaging capacitor can be augmented by placing additional capacitance in c3a. c3a = 10 nf (size 0402) r7a rf input interface. the 75 resistor at r7a combines with the adl5504 internal input impedance to give a broadband input impedance of around 50 . r7a = 75 (size 0402) c4a, r2a, r3a output filtering. the combination of the internal 100 output resistance and c4a produce a low-pass filter to reduce output ripple of the vrms output. the output can be scaled down using the resistor divider pads, r2a and r3a. r3a = 0 (size 0402) r2a = open (size 0402) c4a= open (size 0402) sw1a, r4a, r10a, p2 device enable. when the sw1a is set to the on position, the enbl pin is connected to the supply and the adl5504 is in enable mode. in the opposite switch position, the enbl pin is grounded (through the 0 resistor) putting the device in power-down mode. r4a = 0 (size 0402) r10a = open (size 0402) sw1a = on position p2 = not installed p1, r1a, r5a, r6a, r8a, r9a alternate interface. the end connector, p1, allows access to various adl5504 signals. these signal paths are only used during factory test and characterization. p1 = not installed r1a = r5a = open (size 0402) r6a = r9a = open (size 0402) r8a = open (size 0805)
adl5504 rev. a | page 22 of 24 outline dimensions 082609-a 0.40 ref 0.80 ref 1.230 1.190 1.150 0.830 0.790 0.750 seating plane 0.660 0.600 0.540 0.40 ref a 12 b c top view (ball side down) bottom view (ball side up) ball a1 identifier coplanarity 0.05 0.430 0.400 0.370 0.280 0.260 0.240 0.230 0.200 0.170 figure 49 . 6-b all w afer level chip scale package [wlcsp] ( cb -6-8) dimensions shown in millimeters ordering guide model 1 temperature range package description package option branding ordering quantity adl5504acbz - p7 C 40c to +85c 6- ball wlcsp, 7 pocket tape and reel cb-6-8 3p 3,000 adl5504acbz - p2 C 40c to +85c 6- ball wlcsp, 7 pocket tape and reel cb-6-8 3p 250 adl5504 - evalz evaluation board 1 z = rohs compliant part.
adl5504 rev. a | page 23 of 24 notes
adl5504 rev. a | page 24 of 24 notes ? 2009 - 2011 analog devices, inc. all rights reserved. trademarks and registe red trademarks are the property of their respective owners. d08437 -0- 1/11(a)

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